Vyges: First Year Anniversary

One year ago today, we launched with a claim: silicon should be built like software. A year on, the catalog is open, the sign-off engines are open, and a chip has gone from specification to tapeout using the foundation we set out to build.

August 11, 2026 • By Shivaram Mysore

One year ago today, Vyges™ launched with a sentence that sounded simple and turned out to be a lot of work:

Build silicon like software.

Software solved reuse decades ago. You find a package, read what it needs, pull it in, and let CI tell you whether it still works. Hardware never got that. Silicon IP moved as tarballs and PDFs, and "does this block actually fit my design?" was a question you answered by reading a datasheet and hoping.

I have spent two decades building products — more than thirty of them, across five startups — and that contrast never stopped bothering me. The tooling that made software reuse routine was not magic. It was metadata, automation, and a culture of checking. None of that is unavailable to hardware. It simply had not been built.

We spent the year building the pieces that could make the software answer possible for silicon.

What we built

An open IP catalog. More than 160 open-source silicon blocks, each described using a machine-readable metadata standard that captures what the block actually is — its interfaces, files, dependencies, bus information and PDK targets — rather than what a document claims. A CLI resolves and stages them the way a package manager would.

Open sign-off. Reuse is only useful if you can check what you pulled. So we built Vyges™ Loom, an open sign-off suite covering geometric checks, LVS, parasitic extraction, timing with signal integrity, and other physical-design workflows. It is designed to run alongside the tools you already use and provide an independent, deterministic check — not to pretend that one tool replaces an entire sign-off ecosystem.

Open standards. The metadata specification behind the catalog, together with a vendor-neutral descriptor for PDKs — effectively a machine-readable specification of what a process provides and how tools consume it.

Tools that explain themselves. Every Loom engine describes its own interface and capabilities. That makes it possible for an off-the-shelf AI model to discover and drive real EDA tools without fine-tuning or per-tool integration code.

The intelligence plans. The deterministic tools decide.

The part that mattered most

We taped out a chip.

The Vyges™ Edge Sensor SoC went from specification through verification, implementation and tapeout using the foundation we had been building. It was sent to a real shuttle and was named a ChipFoundry Silicon2System finalist.

That was an important moment for us.

It is one thing to argue that silicon can be built like software. It is another to use the ideas to build and tape out actual silicon.

In July, we took that work to DAC 2026, participating in the Open-Source EDA Birds of a Feather session and demonstrating a language model driving real design-rule sign-off. The model handled the reasoning and orchestration; the actual verification remained with deterministic EDA tools.

But the other important signal from the first year is market interest.

We have prospects who are excited about what we are building, and we are beginning to see real interest in applying Vyges to semiconductor design and development. It is still early, and there is more work to do, but we are encouraged by the conversations underway.

Stay tuned — we expect to have more to share in the coming months.

The sign-off work is also beginning to get its own life beyond our immediate development.

The first Vyges Loom sign-off engines were released publicly in June. They are already being discussed for experimentation and evaluation by engineers working on real design flows. That is still early, but it is exactly the kind of signal we were hoping to see: open-source infrastructure moving from something we built to something other engineers want to try.

A major milestone for open silicon

Another important step this year was bringing OpenROAD's OpenDB into the Vyges Loom suite.

OpenDB provides a powerful foundation for representing physical-design data. Building Loom around that foundation is what turns it from a collection of sign-off engines into something closer to a flow — engines that share one representation of the design, hand results to each other, and can be composed into complete, executable workflows rather than run in isolation.

That matters especially as we move beyond individual dies.

The work is becoming a foundation for chiplet, 2.5D and 3D integration flows, where the ability to represent, inspect and verify the relationships between multiple dies and their interfaces becomes as important as verifying each die individually.

Our goal is not to replace the open-source infrastructure that already exists. It is to contribute tooling that makes that infrastructure more useful, composable and executable in real flows.

What the year actually taught us

The interesting problem was never generation.

AI is already making it dramatically cheaper to produce designs, code and even complex engineering artifacts. What it does not make cheap is knowing that the result is correct.

That distinction became central to our work.

Make the artifacts describable. Make the tools deterministic and runnable. Make the interfaces machine-readable. Make the evidence inspectable. Then let anyone — a human, a CI system or an AI agent — compose the pieces and verify the result.

That is the foundation we are building.

Year two

The first year was about proving the thesis and building the foundation.

Year two is about turning that foundation into a business.

That means customer engagements and revenue, more SoCs built alongside the teams we work with, expanding the silicon we can help bring from specification to tapeout, and making Vyges Loom useful across increasingly complete design flows.

It also means contributing more deeply to the open-source EDA ecosystem.

The OpenDB work is an example of the direction we want to take: build on strong open foundations, contribute useful infrastructure back, and make open-source EDA capable of supporting increasingly sophisticated silicon — including chiplets and 2.5D/3D systems.

The direction does not change:

Build silicon like software. Make the infrastructure open where it should be open. Make verification deterministic where it has to be. And turn the foundation into real silicon, real customers and real revenue.

To everyone who filed an issue, tried a build, contributed code, argued with us at a conference, or quietly cloned the catalog to see what was in it — thank you.

The first year was about building the foundation.

Year two is about building on it.

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