Vyges Loom
Layout-vs-schematic — does the layout implement the schematic? A MATCH / MISMATCH verdict with diagnostics that name where it diverges. Digital, analog and mixed-signal netlists alike — the device-graph compare is technology-agnostic.
Used by: anyone signing off a layout — and anyone who has lost an afternoon to a cryptic mismatch report.
A layout is only correct if it implements the schematic — same devices, same connectivity. vyges-lvs proves that by matching the two netlists as graphs, independent of how nets and instances happen to be named (name-independent colour-refinement). When they don't match, the only thing that matters is where — so it names the unmatched devices and nets, where the open incumbent (Netgen) prints a terse "do not match." It can also extract the layout netlist straight from GDS, so you don't need a separate extractor in the loop.
Not a toy — checked against the reference open extractors and comparators on real sky130:
inv_1) the native GDS extraction is net-level identical to Magic's golden netlist — a full LVS MATCH, hvt variant included.vyges-lvs and Netgen agree 3/3 (MATCH on renamed/reordered nets; MISMATCH on a dropped cell and a swapped net) — with vyges-lvs naming the unmatched classes.A .lvs job file names the two netlists to compare — or a .gds + a layer .rules deck to extract the layout side natively first. Standard CLI: --json, --quiet, --verbose, and a --fail-on-mismatch exit code that gates CI.
Describe the comparison, not a tool-specific rule script. One verdict out, with the divergence named.
The comparator and the GDS extractor are open and runnable today. The per-foundry device-recognition decks (NDA) stay private. See all the engines & the data spine →