Last Updated: June 2026
Vyges is AI-native silicon engineering. Bring your AI model, your PDK, and your IP, and turn them into fab-ready silicon in weeks, not months. Vyges operates the first open registry for silicon IP (VyCatalog), publishes a suite of commercial-grade, open-source EDA sign-off engines (Apache-2.0) any AI model can drive locally, ships an end-to-end flow, and licenses fab-ready SoC IP and commissioned silicon — replacing $2–5M and 6–9 months of outsourced integration with weeks-not-months delivery, anchored on the Vyges Metadata Standard, the machine-readable model that turns silicon IP into composable, governed, AI-agent-consumable artifacts.
vyges-layout geometry kernel — Apache-2.0Sell fab-ready SoC IP and silicon, and treat silicon delivery like software — open standards, automated promotion to fab-ready artifacts, and a metadata-first ecosystem. Replace months of outsourced integration with weeks-not-months delivery.
Fab-ready SoC IP licensing and commissioned silicon — complete, integrated, verified SoC designs delivered in weeks instead of the months a typical outsourced-integration program requires. Engagement structure is scoped per program; engagement-based pricing.
The Vyges Loom silicon sign-off suite opens up capability previously gated behind six-figure licenses — vyges-char (characterization → Liberty), vyges-extract (RC parasitics → SPEF), vyges-power (power analysis), vyges-sta-si (static timing with signal integrity), vyges-em-ir (IR-drop / electromigration), vyges-thermal (on-chip temperature / hotspot), and vyges-lvs (layout-vs-schematic) — over the vyges-layout geometry kernel. Each is driven by a declarative job file over plain file formats (Liberty, SPEF, SPICE, GDSII), runs alongside or inside existing OpenLane/LibreLane flows, and is open-core: the engine is open and contains no foundry-confidential data; per-foundry calibration ships as separate NDA plugins.
The first open registry for silicon IP. 125+ IPs indexed at launch, every entry described by the Vyges Metadata Standard and rendered as a machine-readable, AI-agent-consumable IP Nutrition Label. Software has PyPI, npm, and Crates.io. Until VyCatalog, silicon had nothing equivalent.
The same registry engine and the same metadata standard, deployed inside the customer's perimeter — on-premise, customer cloud, or Vyges-managed. For organizations with proprietary, embargoed, or licensed IP that cannot sit in a public catalog. One engine, one metadata model, two configurations.
AI-IDE extension that operationalizes Vyges' IP-development conventions inside the editor. VS Code and Cursor support; bring-your-own-LLM keys; works with commercial or in-house models.
A family of self-contained silicon-IP environments: VyBox Lite (a browser-based cloud IDE via GitHub Codespaces, with pre-installed open-source EDA tools), VyBox EDA (the open RTL→GDSII toolchain as a single pullable container, ghcr.io/vyges-tools/vybox-eda), and VyBox-Sley — the end-to-end sign-off flow orchestrator that runs the Vyges engines RTL→GDSII in one image (early access). VyBox Enterprise is a separate custom engagement for organizations needing specific commercial vendor tools, LLM choice, authentication, and deployment topology.
The package manager for silicon IP — same pattern as npm for npmjs.org and pip for PyPI. A free front door to programmatic catalog and PDK access.
vyges-layout kernel — Apache-2.0, correlated against the reference open tools on real sky130ghcr.io/vyges-tools/vybox-edaOver 20 years of experience in software, standards, and platform infrastructure. Former roles at Sun Microsystems, Microsoft, and Infoblox. Active in standards development with W3C, ANSI/ISO, PC/SC Workgroup, and Open Networking Foundation. Full bio: Executive Bio.
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