Vyges Loom · Physical implementation

vyges-rsz

Repair the placed design before you trust its timing.

Repeaters for long wires, buffers at the ports, drivers resized — and setup, hold and power recovery on real parasitics.

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What it does

Used by: anyone closing a placed block — slew, capacitance and wire-length violations have to be gone before timing means anything.

A freshly placed design breaks electrical rules everywhere: wires too long for their driver, nets loaded past their capacitance limit, transitions slower than the library allows. Until those are fixed, a timing report is measuring a circuit that will not behave as modelled.

vyges-rsz walks each net's Steiner tree and inserts repeaters where a wire is too long or a capacitance, fanout or transition limit is broken, resizes drivers, and buffers the ports. Then it repairs timing — setup, hold and power recovery — on placement or global-route parasitics, keeping routing and legalization in step as it goes.

.odb + Liberty + SDC + JSON job ──► vyges-rsz ──► repaired design (DEF) + decision trace

Every move, in the order it was made

Ask for a trace and vyges-rsz writes one line per decision — which net, which buffer, which driver, why — in the order the repair made them. When a repair surprises you, you read why instead of re-running it with more logging.

One corner or several, flat or hierarchical netlists, and the SDC constraints a real flow uses — clocks real and virtual, port delays and loads, design-level capacitance limits.

The setup repair runs its full move sequence — sizing, buffering, cloning, swapping and Vt changes — scored by the same timer at every step.

"Nothing to fix" comes with a count

Status is repaired, up to date, vacuous or error. Up to date means every driver was checked and none needed a change — and the report says how many it checked. Vacuous means nothing was checked at all, and it is not a pass.

Try it

$ vyges install physical # one-time: fetch the implementation engines into ~/.vyges/bin
$ vyges physical rsz repair_design job.json # fix slew, capacitance, fanout and wire length
$ vyges physical rsz buffer_ports job.json # buffer the inputs and outputs

Exit status is the verdict: 0 repaired or up to date · 2 vacuous or error.

Where it sits in the flow

After gpl places the design, around dpl legalization and cts, and before routing. It works the physical design; its netlist-level siblings resize, buffer-insert and hold-fix act on a netlist before or after.